Skip to content

arch/aarch64: Fix nested interrupt issue

Rama Krishna Katta requested to merge topics/ramkat01/upstream-gic into main

Fixes a bug in interrupt clear handling based on TF-A documentation for AArch64. Interrupt clear requires writing back the IAR value to the EOIR register. This change adds a local iar variable instead of using current_iar, ensuring that the correct interrupt ID is written when clearing the interrupt in case irq_global() has been preempted by a higher-priority interrupt.

Background on why IAR needs to be written: Arm standard aarch64 platforms write the id ICC_EOIR0_EL1 or ICC_EOIR1_EL1 system register in case of GICv3 depending on where the API is invoked from, EL3 or S-EL1. This deactivates the corresponding interrupt in the interrupt controller.

Signed-off-by: Ahmed Azeem ahmed.azeem@arm.com Signed-off-by: Rama Krishna Katta ramakrishna.katta@arm.com

Merge request reports