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N1sdp/c2c phase 1

Darryl Green requested to merge github/fork/manojkumar-arm/n1sdp/c2c-phase-1 into master

Created by: manojkumar-arm

This patch set contains patches to enable multichip initialization with two N1SDP systems over CCIX link. Phase 1 performs CCIX initialization and exposes slave DDR memory to master CPUs. Slave core power-up sequencing will be added in next patchset.

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