n1sdp: fix timer sync random failures in multichip mode
Created by: manojkumar-arm
This patch fixes random boot failures in timer synchronization between two N1SDP in multichip operation by:
- Reset the REFCLK counter before starting the sync process.
- Adjust the CCIX delay close to the board setup.
Change-Id: I3b721a43a68f7ab8695231f8340012122b5f7875 Signed-off-by: Manoj Kumar manoj.kumar3@arm.com