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module/sc_pll: Fix the lock timeout and error handling of the functions

Himanshu Sharma requested to merge hs/sc-pll-timeout into main

FWK_E_TIMEOUT is returned if the PLL lock is not achieved till the timeout period. This error is not propagated up to the functions iterating on the POSTDIV min-max values. With timeout returned, the set_rate function should be stopped for any further calculations. Instead, it continues with the next iterations on POSTDIV1 and POSTDIV2 with the existing implementation. Adding the check for FWK_E_TIMEOUT alongside FWK_SUCCESS.

The PLL lock timeout value has been erroneously changed to 0x100 while making SC_PLL a generic SCP module. Reverting it back to the original value 0x100000 used previously in the product-based implementation.

Also, add unit-tests for pll_write() function and test for its success and timeout.

Signed-off-by: Himanshu Sharma Himanshu.Sharma@arm.com Change-Id: I8db833d4ee3edf6ade7e297178b1292cbdc1db75

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