Commit 1dbcb2b7 authored by Christopher Daniel Emmons's avatar Christopher Daniel Emmons Committed by Chris Emmons

ARM: Fix broken coherency for DMA ops

This fixes a problem with dc zva/WriteInvalidate testing on v7. The
The system has coherent I/O and the kernel needs to know this.

What would happen is the IO cache would hold DMA descriptor information
in Exclusive state and the core would send uncacheable requests that
effectively bypassed the coherence.  The IO device would then act on
incoherent data.
parent 3396bd47
......@@ -22,6 +22,8 @@ static inline struct dma_map_ops *__generic_dma_ops(struct device *dev)
{
if (dev && dev->archdata.dma_ops)
return dev->archdata.dma_ops;
if (arch_is_coherent())
return &arm_coherent_dma_ops;
return &arm_dma_ops;
}
......
......@@ -24,6 +24,10 @@
#include <mach/memory.h>
#endif
#ifndef arch_is_coherent
#define arch_is_coherent() 0
#endif
/*
* Allow for constants defined here to be used from assembly code
* by prepending the UL suffix only with actual C code compilation.
......
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