• Benoit Parrot's avatar
    ARM: OMAP: DRA7xx: Make CAM clock domain SWSUP only · 2baee0c5
    Benoit Parrot authored
    
    
    Both CAL and VIP rely on this clock domain. But CAL DPHY require
    LVDSRX_96M_GFCLK to be active. When this domain is set to HWSUP the
    LVDSRX_96M_GFCLK is on;y active when VIP1 clock is also active.  If only
    CAL on DRA72x (which uses the VIP2 clkctrl) probes the CAM domain is
    enabled but the LVDSRX_96M_GFCLK is left gated. Since LVDSRX_96M_GFCLK
    is sourcing the input clock to the DPHY then actual frame capture cannot
    start as the phy are inactive.
    
    So we either have to also enabled VIP1 even if we don't intend on using
    it or we need to set the CAM domain to use SWSUP only.
    
    This patch implements the latter.
    
    Signed-off-by: default avatarBenoit Parrot <bparrot@ti.com>
    Acked-by: default avatarTony Lindgren <tony@atomide.com>
    Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
    2baee0c5