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n1sdp: fix timer sync random failures in multichip mode

Created by: manojkumar-arm

This patch fixes random boot failures in timer synchronization between two N1SDP in multichip operation by:

  1. Reset the REFCLK counter before starting the sync process.
  2. Adjust the CCIX delay close to the board setup.

Change-Id: I3b721a43a68f7ab8695231f8340012122b5f7875 Signed-off-by: Manoj Kumar

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